Phase lock loops are used extensively in modern FM communication receivers and transmitters. In recent years, PLLs have been used to control the local oscillator (LO) of superheterodyne receivers to produce an intermediate frequency (IF). The incoming RF signal is mixed with the LO signal to provide a lower intermediate frequency at which filtering and amplification are more readily achieved. The advantages of amplification and filtering at a lower intermediate frequency are well-known and are described in the literature. A conventional PLL locks the LO to a fixed frequency, determined by the reference oscillator frequency and other loop parameters, such as divider ratios. Additional controlling means can be used to lock the LO to the received signal. The main advantage of phase locking the LO to the received signal is to eliminate the frequency error between the received carrier frequency and the LO frequency that would otherwise occur if the LO operated at a fixed frequency. In narrow band, high frequency FM systems, elimination of the frequency error is necessary to eliminate distortion caused by system imperfections. For example, in some cases the frequency of the incoming RF signal which is received may vary up to +/-5 ppm (parts-per-million) from the assigned frequency due to component make tolerances and/or due to the effects of aging and temperature on component values. At UHF frequencies of 800 MHz and above, a +/-5 ppm error in the incoming RF signal can result in a +/-4 KHz frequency error in the intermediate frequency. Similarly, the receiver LO signal may also exhibit up to a +/-5 ppm error due to imperfect components and the effects of aging and temperature. The frequency error of the LO signal is added to the frequency error of the incoming RF signal resulting in a net frequency error at the intermediate frequency.
This frequency error can cause the converted IF signal to fall on the edge or outside the pass band of the narrow band IF filter stage. Operation at the edge or outside the bandwidth of the IF filter results in undesired distortion of the FM signal. Phase lock control is a way of greatly reducing the frequency error that occurs at the intermediate frequency. Phase lock control of an FM receiver can be accomplished by comparing an intermediate frequency signal in the receiver with a stable reference frequency using a phase detector. The phase detector is known as the control loop phase detector. The intermediate frequency may be divided by a frequency divider stage of value "N" prior to the phase detector. If the intermediate frequency is divided by a divider stage, the value of the intermediate frequency is equal to the reference frequency times "N" when the loop is locked. The output of the phase detector controls the LO frequency which in turn produces a constant IF. This circuit loop that phase locks the IF signal to the reference signal as described above is called the control PLL.
Because the LO tracks the incoming RF signal to produce the IF signal, the frequency error associated with the incoming RF signal is. eliminated. Any net frequency difference between the received signal carrier and the LO will be eliminated by the control PLL adjusting the frequency of the LO to the frequency of the received signal carrier. The net frequency difference can be set to zero, or to some other fixed frequency offset which may be desired.
As described above, the utilization of a control PLL greatly reduces the frequency error present at the intermediate frequency. The disadvantage of using a control loop is that the control loop modifies the frequency response of the demodulated incoming RF signal. The modification occurs because the control loop PLL has its own bandwidth that is determined by the speed required to achieve phase lock of the IF signal. Low frequency modulating signals that fall within the bandwidth of the control PLL are attenuated which in turn causes the demodulated signal to have a high-pass frequency response.
To recover the low frequency components that are attenuated by the control PLL, one technique taught by the prior art is to use dual port demodulation. An example of this is found in U.S. Pat. No. 4,837,853, entitled "Dual Port FM Demodulation in Phase Locked Receivers", by Joseph P. Heck. In dual port demodulation, the high frequency components that are not attenuated by the control PLL are demodulated by a conventional FM demodulator. The lower frequency components that fall within the bandwidth of the control PLL are recovered by summing the output of the control loop phase detector or the control line input of the control loop VCO with the output of the conventional demodulator. The high frequency components and the low frequency components are properly weighted at the summation stage to provide a substantially flat frequency response that would have conventionally resulted in the FM receiver without the influence of the control PLL.
Referring to FIG. 1, a block diagram of a prior art single conversion FM receiver 100 that utilizes a dual port demodulation method similar to that discussed above is shown. The received FM signal 102 is mixed via mixer 104 with a local oscillator (LO) signal 132. The resulting signal is an intermediate frequency (IF) signal 134. The IF signal 134 then goes through IF bandpass filter 106 which provides the selectivity of the receiver and then through a limiter stage 108 which provides an output signal 110. Output signal 110 is then sent to frequency demodulator 112. Demodulator 112 provides a demodulated signal 114.
Output signal 110 coming from limiter 108 is also provided to the control PLL that controls the frequency of the synthesized LO PLL 130. The control PLL is comprised of mixer 104, IF bandpass filter 106, limiter 108, frequency divider 124, reference oscillator 126, phase detector 128, and LO PLL 130. The control PLL steers LO PLL 130 to the correct frequency in order to develop the desired IF signal 134. A means by which the output frequency of the LO PLL 130 can be controlled is described in U.S. Pat. No. 5,079,526, entitled "Frequency Modulated Synthesizer Using Low Frequency Offset Mixed VCO", by Joseph P. Heck. The control PLL causes the LO PLL 130 to track the received signal 102 so that the intermediate frequency signal 134 is equal to the divider ratio (N) of divider 124 times the loop reference frequency (Fref) from oscillator 126. The full spectrum demodulated output signal 122 is obtained by combining the low frequency information signal 136 with the high frequency information signal 114 into a summing network 120 with the signal weighting provided by gain constants 118 and 116, respectively. The weighting factors K.sub.1 and K.sub.2 provided by gain constants 118 and 116 account for the voltage to frequency conversion gain factor of the LO VCO 130, and the frequency-to-voltage conversion factor of the FM demodulator 112. Both are adjusted to equally weight the low and high frequency components. The demodulated output signal available at output 122 therefore will be the same response that would have resulted without the interference caused by the control PLL.
In the case that the LO is implemented with a synthesized LO PLL 130 as shown in FIG. 1, the demodulation response of the signal at output 122 will be flat only if the bandwidth of the synthesized LO PLL 130 is much greater that the bandwidth of the control PLL. For practical considerations such as lock time, noise performance, and suppression of spurious sidebands, the bandwidth of the LO PLL 130 may not be set at a value that is much greater than the control PLL's bandwidth. If the bandwidth of the LO PLL is not substantially greater than the control PLL bandwidth, then the LO PLL 130 will induce phase distortion (phase delay) in the feedback path of the control PLL. This phase distortion will result in a dual port demodulation amplitude versus frequency response which is significantly modified from the desired flat response. A need therefore exists for a method and apparatus for compensating PLL circuits, and in one particular embodiment, a circuit which can account for the phase distortion induced by the synthesized LO PLL in order to provide for a substantially flat demodulated frequency response.